A €4-million collaborative research project is being funded by the European Union’s Seventh Framework Program. The project has been dubbed GALAXY for GALS InterfAce compleX digital sYstem integration. Program participants will work to develop globally asynchronous, locally synchronous (GALS) architecture chips, as well as novel network-on-chip (NoC) capabilities. Participating entities include consortium leader the IHP GmbH of Frankfurt-Oder, Germany, the University of Manchester, the Ecole Polytechnique Fédérale de Lausanne, the Alma Mater Studorium – Universitá of Bologna, Silistix UK Ltd., and Infineon Technologies AG of Neubiberg, Germany. Increased complexity, escalating performance requirements, the need for power and electromagnetic interference reduction, and the move toward nano-scale dimensions pose considerable challenges to chip developers and systems engineers. The project’s strategy is to explore and to evaluate the option of using GALS to resolve these issues. GALS architecture is seen as a promising technology because of its inherent reduced EMI and low-power properties. Learn more about this research project at the Galaxy website. Some of the best minds from academe will be sharing their ideas at the upcoming EMC Society Symposium. Look for the latest program postings on the special Interference Technology Symposium Channel debuting August 4, 2008.
European Union to Fund GALS Project to Boost System Integration and to Reduce EMI
